Jules Jelinek

San Francisco, California, USA IEEE San Francisco Section
Special Skills

Technical Specialities

Specialist in MOS analog and mixed mode integrated circuit design and techniques. Areas of expertise include phase lock loop design, data recovery systems, transceiver design, custom analog circuit development, design evaluation, product development / enhancement, product performance analysis and product toubleshooting. Extensive experience providing reverse engineering, patent analysis, prior art evaluation, patent invalidation, patent search, target product selection, and technical case support services to the legal profession, corporate IP groups and the intellectual property industry. Providing the IC design and legal community with consulting services since 1987. Hold many patents.

Technical Expertise

Analog Design
IC Design
New Product Development
Training
Expert Witness
Troubleshooting
Microprocessors
Management
Contact
experience
Owner/Partner
Employer Unknown
education
School Unknown
Master of Science
San Francisco State Univ
Associate of Science
Other , 1989
University of California-Berkeley
Bachelor of Science
Physical Sciences , 1984
opportunities settings
Employment Preferences
  • Employment Type: Consultant, Contract Employee
  • Desired Salary: Not Applicable
  • Travel: None
  • Available for International Assignments: No
  • Commute: Not Applicable