Optimal Design specializes in high performance FPGA development. Since incorporation in 1993, ODI has created numerous FPGA solutions for optical networks, telecommunications, broadband video, medical imaging, and high performance computing (HPC). ODI is proficient in both VHDL and Verilog, and has targeted numerous Xilinx and Altera FPGAs. Expertise in capturing complex algorithms onto FPGA fabric and achieving best performance possible through effective floorplanning. Key hardware techniques that have been successfully implemented include DSP (FFT, FIR Filter), parallel processing (HPC algorithms such as matrix multiply), data compression and decryption (MPEG-4), data acquisition and image processing (PET Scanner), and optical networks testing (BERT, protocol). ODI has working knowledge of many telecommunications standards, including 10GE, Gigabit Ethernet, PoS, SONET, IP, OTN, and ATM. Each project is functionally verified using ModelSim simulator. Each project is also accompanied by a hardware specification detailing functional and performance characteristics complete with block diagrams, timing diagrams, and programming guidelines. MSEE from Drexel University; member of the IEEE Computer Society; associate member of the Xilinx Alliance Program. Available through 1099 tax basis or an independent contract. U.S. citizen.

Mentor ModelSim simulator for functional and gate-level verification; Synplicity for FPGA synthesis; Mentor Precision and Leonardo Spectrum for FPGA synthesis; Xilinx ISE FPGA development tools, including XST for synthesis, PlanAhead for floorplanning, FPGA Editor for route analysis, and CORE Generator; Visual SlickEdit Esprimo for HDL and C code development; Altera Quartus Design Software; C, Tcl, Fortran, Assembly code; Visio for block and timing diagrams; Synopsys DC Compiler for ASIC synthesis; Synopsys FPGA Express for synthesis. Linux/Tcl scripting.