Dr.
Adriaan Van Wijngaarden
Biography
Adriaan J. (de Lind) van Wijngaarden is with Bell Laboratories, Nokia, in Murray Hill, NJ. He received an engineering degree in electrical engineering from Eindhoven University of Technology, The Netherlands, and a doctorate in engineering from the University of Essen, Germany. From 1992-1998, he was a Research Engineer with the Digital Communication Group, Inst. for Exp. Math., University of Essen, Germany. He is deeply engaged in research in communications, information theory and coding. He provided key contributions to recording, optical systems and broadband access. He has authored more than 78 technical papers, and holds more than 76 patents. He has served as a Publication Editor and Associate Editor of the IEEE Trans. Inform. Theory. As of 2011, he serves as an officer of the IEEE North Jersey Section Executive Committee, and he served as its Chair in 2015-16. He also served as IEEE METSAC Chair (2017-2024) and as IEEE MGA Vice-Chair/ITCO Committee Chair (2023-2024).
Publications
Amitkumar Mahadevan, Doutje van VeenNoriaki KanedaAlex DuqueAdriaan de Lind van Wijngaarden, and Vincent Houtsma, "Hard-input FEC evaluation using Markov models for equalization-induced correlated errors in 50G PON," Journal of Optical Communications and Networking, vol. 13, no. 1, pp. A100, 2021.
Amitkumar Mahadevan, Doutje van VeenNoriaki KanedaAlex DuqueAdriaan de Lind van Wijngaarden, and Vincent Houtsma, "50G {PON} {FEC} Evaluation with Error Models for Advanced Equalization," in Optical Fiber Communication Conference ({OFC}) 2020, 2020
Ju Lin, Sufeng NiuAdriaan J. van WijngaardenJerome L. McClendonMelissa C. Smith, and Kuang-Ching Wang, "Improved Speech Enhancement Using a Time-Domain {GAN} with Mask Learning," in Interspeech 2020, 2020
Ju Lin, Sufeng NiuZice WeiXiang LanAdriaan J. van WijngaardenMelissa C. Smith, et al., "Speech Enhancement Using Forked Generative Adversarial Networks with Spectral Subtraction," in Interspeech 2019, 2019
Suvakovic, D. and van Wijngaarden, A.J., "RAM-based micro-architecture for a high-throughput interconnection network," in Sarnoff Symposium, 2015 36th IEEE, 2015, pp. 105 - 110.